CIF Plasma Cleaner Empowers Self-Cleaning van der Waals Lamination of 2D Materials; Hunan University Joint Team's Breakthrough Published in Science Bulletin!

Time：2026-08-05 Click Count：27

Recently, Associate Professor Chang Liu from Hunan University, in collaboration with teams from the Shanghai Institute of Technical Physics (SITP), Chinese Academy of Sciences, and Fudan University, published a groundbreaking study in the prestigious domestic journal Science Bulletin. The team introduced the Elastic Bevel Stamp-Assisted Thermal Lamination (EBTL) self-cleaning stacking technology, successfully overcoming critical industry bottlenecks such as interfacial contamination, bubbles, and wrinkles in two-dimensional (2D) materials.

During the preparation of the elastic bevel stamp (EBS) in this study, the research group utilized the CIF CPC-F Plus Plasma Cleaner to complete the plasma activation and bonding process. As a crucial pretreatment step in the entire process, it helped the method achieve an ultra-high clean interface yield of over 95%, providing reliable process support for the development of wafer-scale stacking and 3D integrated devices for 2D materials.

Two-dimensional materials are like atomically thin sheets. Stacking them layer by layer can construct van der Waals (vdW) heterostructures with novel functions, providing an essential platform for next-generation electronic devices and 3D integration. However, during the seemingly simple "lamination" process, molecules such as water, oxygen, and air can easily become trapped between the layers, forming bubbles, wrinkles, and defects that ultimately degrade material quality and device performance.

To address this issue, researchers from SITP, Hunan University, and Fudan University collaboratively proposed the EBTL technology. This approach achieves self-cleaning vdW lamination for 2D materials, effectively resolving the challenges of interfacial contaminants, bubbles, and wrinkles commonly caused by traditional lamination processes, thereby significantly improving stacking cleanliness and device performance. The findings were published under the title "Self-cleaning van der Waals lamination for two-dimensional electronics" in Science Bulletin, a highly influential comprehensive academic journal co-sponsored by the Chinese Academy of Sciences and the National Natural Science Foundation of China.

The proposed EBTL technology actively expels interlayer impurities during lamination to obtain ultra-clean vdW interfaces. Centered around the EBS equipped with an ultra-flat vdW adhesion layer (VAL), the process is conducted with in-situ heating at 150 °C. The bevel stamp applies uniform and controllable external force to achieve "soft lamination," gradually squeezing out interlayer molecules. Simultaneously, the in-situ heating promotes the desorption of physically adsorbed surface molecules, enabling their in-situ expulsion during lamination. Through nanomechanical analysis, the authors optimized key parameters such as the stamp's tilt angle, size, and height, achieving efficient and damage-free lamination on large-area monolayer materials. The ultra-clean 2D stacked structures fabricated via this technology exhibit an average interfacial yield of >95%. The resulting devices demonstrate significantly superior performance compared to those made by traditional methods, culminating in the demonstration of a fully vdW-laminated 2D transistor array.